1. Field of Invention
The present invention relates to an etching process, and more generally to a process of forming a slit in a silicon substrate.
2. Description of Related Art
In order to accelerate operating speed of integrated circuits and to meet customers' demands for miniaturizing electronic devices, physical dimensions of transistors in a semiconductor apparatus are continuously reduced. However, with the reduction in physical dimensions of transistors, the length of channel regions in the transistors is also decreased. Thus, a severe short channel effect would occur in the transistors.
To resolve said issue, a conventional horizontal transistor structure is recently replaced by a vertical transistor structure in the industry. For example, a gate is filled in a slit of a substrate. Hence, the operating speed and integration of integrated circuits are enhanced and problems such as short channel effect are avoided. The slit is usually formed between shallow trench isolation (STI) structures. However, during the step of forming the slit in the substrate, silicon oxide in STI structures is exposed and damaged by the etching process. As a result, the performance and reliability of the device are affected.